1. Technical Field
The present invention generally relates to a semiconductor apparatus, and more particularly, to a three-dimensional (3D) semiconductor apparatus including a plurality of chips stacked therein.
2. Related Art
In order to increase the integration degree of a semiconductor apparatus, a 3D semiconductor apparatus including a plurality of chips stacked and packaged in a single package has been developed. Recently, a through-silicon via (TSV) method has been used, in which a plurality of stacked chips are electrically connected through TSVs.
The 3D semiconductor apparatus includes a plurality of TSVs through which the plurality of stacked chips commonly receives various signals. For example, in the case of a memory apparatus, a plurality of stacked chips commonly receive an address signal, signals for various tests, and input/output line and command signals through the TSVs.
The TSV may have various defects. For example, when the TSV is not completely filled with a conductive material, a void may occur. Furthermore, when a chip is bent or a bump material is moved, a bump contact fail may occur. Furthermore, a crack may occur in the TSV. As described above, the TSV electrically connects a plurality of chips. Therefore, when a defect occurs to open the TSV, the TSV does not perform a normal function. Therefore, a test process of accurately detecting a TSV in which a defect occurred and a repair process of replacing the TSV which has the defect with a normal TSV is required.